(* Copyright Per Lindgren 2014, see the file "LICENSE" *)
(* for the full license governing this code.           *)

(* RTFM-core/IsrVector for STM32F4x5 series of MCU *)

type isr_type =
  | K (* reserved by the RTFM kernel                *)
  | R (* reserved by ARM                            *) 
  | O (* overridable but has default implementation *)
  | F (* free to use by the application             *)
  | U (* used by the application                    *)
    
let isr_vector = [
    (* Core Level - CM3 *)
    (K, "&_estack");                               (* The initial stack pointer *)
    (K, "Reset_Handler");                          (* The reset handler *)
    (O, "NMI_Handler");                            (* The NMI handler *)
    (O, "HardFault_Handler");                      (* The hard fault handler *)
    (O, "MemManage_Handler");                      (* The MPU fault handler *)
    (O, "BusFault_Handler");                       (* The bus fault handler *)
    (O, "UsageFault_Handler");                     (* The usage fault handler *)
    (R, "0");                                      (* Reserved *)
    (R, "0");                                      (* Reserved *)
    (R, "0");                                      (* Reserved *)
    (R, "0");                                      (* Reserved *)
    (O, "SVC_Handler");                            (* SVCall handler *)
    (O, "DebugMon_Handler");                       (* Debug monitor handler *)
    (R, "0");                                      (* Reserved *)
    (O, "PendSV_Handler");                         (* The PendSV handler *)
    (O, "SysTick_Handler");                        (* The SysTick handler *)

    (* Chip Level - STM32F4x5 *)
    (F, "WWDG_IRQHandler");                        (* Window WatchDog *)
    (F, "PVD_IRQHandler");                         (* PVD through EXTI Line detection *)
    (F, "TAMP_STAMP_IRQHandler");                  (* Tamper and TimeStamps through the EXTI line *)
    (F, "RTC_WKUP_IRQHandler");                    (* RTC Wakeup through the EXTI line *)
    (F, "FLASH_IRQHandler");                       (* FLASH *)
    (F, "RCC_IRQHandler");                         (* RCC *)
    (F, "EXTI0_IRQHandler");                       (* EXTI Line0 *)
    (F, "EXTI1_IRQHandler");                       (* EXTI Line1 *)
    (F, "EXTI2_IRQHandler");                       (* EXTI Line2 *)
    (F, "EXTI3_IRQHandler");                       (* EXTI Line3 *)
    (F, "EXTI4_IRQHandler");                       (* EXTI Line4 *)
    (F, "DMA1_Stream0_IRQHandler");                (* DMA1 Stream 0 *)
    (F, "DMA1_Stream1_IRQHandler");                (* DMA1 Stream 1 *)
    (F, "DMA1_Stream2_IRQHandler");                (* DMA1 Stream 2 *)
    (F, "DMA1_Stream3_IRQHandler");                (* DMA1 Stream 3 *)
    (F, "DMA1_Stream4_IRQHandler");                (* DMA1 Stream 4 *)
    (F, "DMA1_Stream5_IRQHandler");                (* DMA1 Stream 5 *)
    (F, "DMA1_Stream6_IRQHandler");                (* DMA1 Stream 6 *)
    (F, "ADC_IRQHandler");                         (* ADC1, ADC2 and ADC3s *)
    (F, "CAN1_TX_IRQHandler");                     (* CAN1 TX *)
    (F, "CAN1_RX0_IRQHandler");                    (* CAN1 RX0 *)
    (F, "CAN1_RX1_IRQHandler");                    (* CAN1 RX1 *)
    (F, "CAN1_SCE_IRQHandler");                    (* CAN1 SCE *)
    (F, "EXTI9_5_IRQHandler");                     (* External Line[9:5]s *)
    (F, "TIM1_BRK_TIM9_IRQHandler");               (* TIM1 Break and TIM9 *)
    (F, "TIM1_UP_TIM10_IRQHandler");               (* TIM1 Update and TIM10 *)
    (F, "TIM1_TRG_COM_TIM11_IRQHandler");          (* TIM1 Trigger and Commutation and TIM11 *)
    (F, "TIM1_CC_IRQHandler");                     (* TIM1 Capture Compare *)
    (F, "TIM2_IRQHandler");                        (* TIM2 *)
    (F, "TIM3_IRQHandler");                        (* TIM3 *)
    (F, "TIM4_IRQHandler");                        (* TIM4 *)
    (F, "I2C1_EV_IRQHandler");                     (* I2C1 Event *)
    (F, "I2C1_ER_IRQHandler");                     (* I2C1 Error *)
    (F, "I2C2_EV_IRQHandler");                     (* I2C2 Event *)
    (F, "I2C2_ER_IRQHandler");                     (* I2C2 Error *)
    (F, "SPI1_IRQHandler");                        (* SPI1 *)
    (F, "SPI2_IRQHandler");                        (* SPI2 *)
    (F, "USART1_IRQHandler");                      (* USART1 *)
    (F, "USART2_IRQHandler");                      (* USART2 *)
    (F, "USART3_IRQHandler");                      (* USART3 *)
    (F, "EXTI15_10_IRQHandler");                   (* External Line[15:10]s *)
    (F, "RTC_Alarm_IRQHandler");                   (* RTC Alarm (A and B) through EXTI Line *)
    (F, "OTG_FS_WKUP_IRQHandler");                 (* USB OTG FS Wakeup through EXTI line *)
    (F, "TIM8_BRK_TIM12_IRQHandler");              (* TIM8 Break and TIM12 *)
    (F, "TIM8_UP_TIM13_IRQHandler");               (* TIM8 Update and TIM13 *)
    (F, "TIM8_TRG_COM_TIM14_IRQHandler");          (* TIM8 Trigger and Commutation and TIM14 *)
    (F, "TIM8_CC_IRQHandler");                     (* TIM8 Capture Compare *)
    (F, "DMA1_Stream7_IRQHandler");                (* DMA1 Stream7 *)
    (F, "FSMC_IRQHandler");                        (* FSMC *)
    (F, "SDIO_IRQHandler");                        (* SDIO *)
    (F, "TIM5_IRQHandler");                        (* TIM5 *)
    (F, "SPI3_IRQHandler");                        (* SPI3 *)
    (F, "UART4_IRQHandler");                       (* UART4 *)
    (F, "UART5_IRQHandler");                       (* UART5 *)
    (F, "TIM6_DAC_IRQHandler");                    (* TIM6 and DAC1&2 underrun errors *)
    (F, "TIM7_IRQHandler");                        (* TIM7 *)
    (F, "DMA2_Stream0_IRQHandler");                (* DMA2 Stream 0 *)
    (F, "DMA2_Stream1_IRQHandler");                (* DMA2 Stream 1 *)
    (F, "DMA2_Stream2_IRQHandler");                (* DMA2 Stream 2 *)
    (F, "DMA2_Stream3_IRQHandler");                (* DMA2 Stream 3 *)
    (F, "DMA2_Stream4_IRQHandler");                (* DMA2 Stream 4 *)
    (F, "ETH_IRQHandler");                         (* Ethernet *)
    (F, "ETH_WKUP_IRQHandler");                    (* Ethernet Wakeup through EXTI line *)
    (F, "CAN2_TX_IRQHandler");                     (* CAN2 TX *)
    (F, "CAN2_RX0_IRQHandler");                    (* CAN2 RX0 *)
    (F, "CAN2_RX1_IRQHandler");                    (* CAN2 RX1 *)
    (F, "CAN2_SCE_IRQHandler");                    (* CAN2 SCE *)
    (F, "OTG_FS_IRQHandler");                      (* USB OTG FS *)
    (F, "DMA2_Stream5_IRQHandler");                (* DMA2 Stream 5 *)
    (F, "DMA2_Stream6_IRQHandler");                (* DMA2 Stream 6 *)
    (F, "DMA2_Stream7_IRQHandler");                (* DMA2 Stream 7 *)
    (F, "USART6_IRQHandler");                      (* USART6 *)
    (F, "I2C3_EV_IRQHandler");                     (* I2C3 event *)
    (F, "I2C3_ER_IRQHandler");                     (* I2C3 error *)
    (F, "OTG_HS_EP1_OUT_IRQHandler");              (* USB OTG HS End Point 1 Out *)
    (F, "OTG_HS_EP1_IN_IRQHandler");               (* USB OTG HS End Point 1 In *)
    (F, "OTG_HS_WKUP_IRQHandler");                 (* USB OTG HS Wakeup through EXTI *)
    (F, "OTG_HS_IRQHandler");                      (* USB OTG HS *)
    (F, "DCMI_IRQHandler");                        (* DCMI *)
    (F, "CRYP_IRQHandler");                        (* CRYP crypto *)
    (F, "HASH_RNG_IRQHandler");                    (* Hash and Rng *)
    (F, "FPU_IRQHandler");                         (* FPU *)
]
    
let isr_maxpri = 32